Regular/Temporary : Temporary
Position description :
In the scope of advanced CMOS technologies for mmW applications, you will join a team in the R&D organization.
One major difficulty in putting an RF circuit in mass production is the variability of device parameters (die to die or vs. time) bringing variability in RF performances. For metric that cannot be measured (at system level or on production tester) (ACLR as an example), performance has to be guaranteed “by design”. Designer must though take some margin vs. specification to count for device variability and thus burn more current than needed.
Alternative approach that will be developed in this thesis will consist in:
⦁ Developing an analytical equation of thecircuit performance (s) using device parameters, actives (Vt, IS0, …) and passives (L, C, Q, …).
⦁ Developing sensors to extract parameters, either in-situ (example measurement of a DC voltage on the gate) or on dedicated PMB (process monitoring blocks).
⦁ Develop recovery strategies (reduce bias when ACLR is too good …) or alarms (ACLR is not good enough, please reduce the output power).
Method can also be used as a BIST (Buil In Self Test)
This PhD will start with a demonstration of the approach on a single performance tuning.
More complex control can be foreseen in a second step (using IA?) to handle multi performance optimization.
On top of creativity, this work will require rigor, tenacity and curiosity.
The candidate will be BAC+5 graduated (Master II or engineering school) with a strong background in analog electronic, RF circuit design and signal processing.
The candidate will be ready to start research activities delaing with analytic circuit equations and MOS transistor models.
Preferably, the candidate will have performed an internship in the field of RF design.
Education level required : 5 – Master degree
Language / Level :
English : 2- Business fluent
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