Regular/Temporary : Temporary
Position description :
Responsible for Analog IP pre and post layout verification, simulation, specification, and documentation
Create behavioral models.
Write test benches for block and system verification.
Contribute to Bench data collection of various Analog blocks.
Junior / Senior BS/MS Electrical Engineering/Computer Science
Exposure to Voltage Regulator, Delta Sigma Analog to Digital Converter, Oscillator, PLL
Knowledge of basic EDA tools (e.g. Cadence, Synopsis, Mentor, spectre/hspice)
Education level required : 3 – Upper secondary education diploma